Hardware emulation systems are designed for verifying electronic circuit designs prior to fabrication as chips or printed circuit boards. Typical emulation systems utilize either programmable logic chips interconnected by programmable interconnect chips or processor chips that are programmably interconnected. In programmable logic chip (e.g., field programmable gate array, or FPGA) based emulation systems, the logic contained in the user's design (often referred to as either the “design under verification” (“DUV”) or “design under test” (“DUT”)) is programmed into the logic chip such that the logic embodied in the DUV takes actual operating form in the programmable logic devices. In processor-based emulation systems, the user's design is processed so that its functionality appears to be created in the processors by calculating the outputs of the design. The logic itself is not implemented in a processor-based emulation system, meaning that the DUV does not take actual operating form in the processors. The outputs of the processors will however be equivalent to the outputs of the logic in the actual implementation. Examples of hardware logic emulation systems using programmable logic devices can be seen in, for example, U.S. Pat. Nos. 5,109,353, 5,036,473, 5,475,830 and 5,960,191. U.S. Pat. Nos. 5,109,353, 5,036,473, 5,475,830 and 5,960,191 are incorporated herein by reference. Examples of hardware logic emulation systems using processor chips can be seen in, for example, U.S. Pat. Nos. 5,551,013, 6,035,117 and 6,051,030. U.S. Pat. Nos. 5,551,013, 6,035,117 and 6,051,030 are incorporated herein by reference.
Visualization, also referred to as tracing, is an important feature in processor-based emulation systems. Visualization is the ability for a user to capture and observe the states of elements in the design being emulated. The ability to observe the state of every node (i.e., processor output) of a particular integrated circuit design, which Cadence Design Systems refers to as “Full-Vision”, is a very important feature for functional verification systems. Full-Vision is needed over certain periods of time, i.e., over a number of clock cycles. By capturing the internal states of the nodes during emulation, the user can observe the activity in the design being emulated and therefore be able to debug the design. Without the ability to observe the internal states of the nodes during emulation, it would be very difficult for a user to understand the cause of any bugs in the design.
Typically, Full-Vision is achieved by capturing a strategic fraction of the nodes in the system. Those outputs are then used to calculate the values of any other node in the system. This allows the user to observe the activity on all nodes of the design, some values being physical samples, while others are derived from calculations. This strategic sampling technique is advantageous because it does not require circuitry to capture every node in the system, yet it still allows the user to observe the activity on any node in the system.
Conventional processor-based emulation systems use emulation resources to capture the states of elements in the design. Emulation resources are the circuitry that is used to emulate the integrated circuit design being tested (e.g., the emulation processors). The amount of emulation resources required to capture the internal states of the design is not trivial. For example, to achieve Full-Vision, approximately 20% of the emulation resources are used. Even if Full-Vision is not required, a significant amount of emulation resources must still be used to capture the internal states of the design. Similarly, a significant amount of memory resources that could be used for emulation are used to capture the internal states of the design. A user must therefore make a tradeoff between using processor resources and memory resources to perform emulation functions or capture functions.
Conditional acquisition is another important feature in processor-based emulation systems. Conditional acquisition allows a user to capture data at a point in time that is “interesting” while ignoring data from other times based on a trigger. A trigger is a predetermined event that causes data to begin being captured. Conditional acquisition also provides an efficient way to use the available capture resources in the system.
Conventional processor-based emulation systems also use emulation resources for conditional acquisition. Specifically, emulation resources are used to store data output from the emulation processors until the trigger condition is calculated. The data output from the emulation processors must be stored because that data is usually available before the trigger condition is calculated.
Thus, there is a need for an improved method and apparatus for capturing data generated in a processor-based emulation system.